Asst.Prof.Paulo Fernando Rocha Garcia, Ph.D.

Assistant Professor

Education

2015    PhD, Department of Electronics & Computer Engineering, University of Minho, Portugal. Thesis Title: "Hybrid Hypervisor Partially Deployed on FPGA". Doctoral work included research periods at the University  of Wurzburg, Germany, and the Asian Institute of Technology, Thailand.

2011    MSc in Real Time Embedded Systems, Department of Electronics & Computer Engineering, University of Minho, Portugal. Thesis Title: "M2uP – Multithreading Microprocessor: Front-End implementation". Graduate work included research periods at the University of Maribor, Germany, and the Asian Institute of Technology, Thailand.

2008    BSc in Industrial Electronics and Computers, Department of Electronics & Computer Engineering, University of Minho, Portugal.

 

Grants Awarded

Thailand :

2023      PMU-C: "A Holographic Health Information Platform for Patient Education Delivering Personalized Genetic Counselling to Users", with Bumrungrand Hospital, 9.9M THB (Co-PI)
 

Publications

Journal articles
  • Fryer, J. and Garcia, P. (2023). "The Good, the Bad and the Ugly: Practices and Perspectives on Hardware Acceleration for Embedded Image Processing", Journal of Signal Processing Systems, Springer (accepted pending minor revisions: revisions submitted)
 
  • Sebastien, C. and Garcia, P. (2022). "Arbitrarily Parallelizable Code: A Model of Computation Evaluated on a Message-Passing Many-Core System." Computers 11, no. 11, p. 164.
 
  • Garcia, P., Darroch, F., West, L., Brooks Cleator, L. (2020). "Ethical Applications of Big Data-Driven AI on Social Systems: Literature Analysis and Example Deployment Use Case", Information, 11, p 235.
 
  • Stewart, R., Berthomieu, B., Garcia, P., Ibrahim, I., Michaelson, G., Wallace, A. (2019). "Verifying parallel dataflow transformations with model checking and its application to FPGAs", Journal of Systems Architecture.
 
  • Garcia, P., Bhowmik, D., Stewart, R., Michaelson, G., Wallace, A. (2019). Optimized Memory Allocation and Power Minimization for FPGA-Based Image Processing. J. Imaging 2019, 5, 7.
 
  • Stewart, R., Duncan, K., Michaelson, G., Garcia, P., Bhowmik, D. and Wallace, A. (2018). RIPL: A Parallel Image Processing Language for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 11, 1, Article 7 (March 2018).
 
  • Gomes, T., Garcia, P., Pinto, S., Monteiro, J. and Tavares, A. (2016). "Bringing Hardware Multithreading to the Real-Time Domain," in IEEE Embedded Systems Letters, vol. 8, no. 1, pp. 2-5, March 2016.
 
  • Garcia, P., Gomes, T., Monteiro, J., Tavares, A. and Ekpanyapong, M. (2016). "On-Chip Message Passing Sub-System for Embedded Inter-Domain Communication," in IEEE Computer Architecture Letters, vol.15, no.1, pp. 33-36, Jan.-June 1.
 
  • Gomes, T., Pereira, P., Garcia, P., Salgado, F., Silva, V., Pinto, S., Tavares, A. (2016). “Hybrid Real-Time Operating Systems: Deployment of Critical FreeRTOS Features on FPGA,” International Journal of Embedded Systems 2016 8:5-6, 483-492, Inderscience.
 
  • Gomes, T., Garcia, P., Salgado, F., Monteiro, J., Ekpanyapong, M., Tavares, A. (2015). "Task-Aware Interrupt Controller: Priority Space Unification in Real-Time Systems," Embedded Systems Letters, IEEE, vol.7, no.1, pp.27-30, March 2015.
 
  • Garcia, P., Gomes, T., Salgado, F., Monteiro, J. and Tavares, A. (2014). "Towards Hardware Embedded Virtualization Technology: Architectural Enhancements to an ARM SoC", ACM SIGBED REVIEW, Vol. 11, no. 2, June 2014.
 
  • Cardoso, N., Rodrigues, P., Vale, J., Garcia, P., Cardoso, P., Monteiro, J., Cabral, J. Mendes, J., Ekpanyapong, M. and Tavares, A. (2012). "A generative-oriented model-driven design environment for customizable video surveillance systems", EURASIP Journal on Embedded Systems.